From 165eda59f349acdd7137453c8f8ebc08b8c36278 Mon Sep 17 00:00:00 2001 From: ThomasBallantine Date: Mon, 10 Feb 2025 21:53:45 +0000 Subject: [PATCH] third commit --- 2015_day_1/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/2015_day_1/README b/2015_day_1/README index 9bbaefd..164b77f 100644 --- a/2015_day_1/README +++ b/2015_day_1/README @@ -1,5 +1,5 @@ Advent of Code 2015 Day 1 -Completed 10/2/2025 +Completed Part 1 10/2/2025 It may be that Verilog state machines followed me home to do this I need to set up some tests on it still Reference on makefiles: https://makefiletutorial.com/ \ No newline at end of file